CMPE 491/691: Digital Signal Processing Hardware Implementation

Course Information

Course Readings/ Tutorials

Paper/Tutorial Comments
counter example Download and generate the .bit file through xilinx ISE Project Navigator flow to program the FPGA. The target fpga device is Virtex-5, XC5VL110T, package FF1136, Speed level -1.
LED flash example Download the project and generate the .bit file through xilinx ISE Project Navigator flow to program the FPGA. The target fpga device is Virtex-5, XC5VL110T, package FF1136, Speed level -1.
 VGA Rectangle on Spartan  learn the fundamental components of the Xilinx FGPA tools required to enter and assemble HDL code using a schematic entry tool and program an FPGA
ML505 User Guide You need to read this in order to know the FPGA pin locations for LED, switches and clock.
Virtex-5 FPGA family You need to read this document in order to get familiar with the resources available on the Virtex-5 FPGA.
Quick reference for verilog Helpful and handy verilog reference.
Verilog according to Tom Helpful intro to verilog. Please also read the accompanying notes.
Isim Simulator Steps for running Isim simulator, with Verilog example files nand_latch.v , nand_latch_tb.v .
Isim Simulator User Manual Complete Xilinx user manual for Isim simulator .
*NEW* Xilinx Timing Constraints User Manual Complete manual for adding timing constraints .
*NEW* LDPC Journal, Mohsenin Useful intro and sample hardware design for LDPC decoding.
PhD thesis on LDPC decoding, Zhengya Zhang Additional information on LDPC decoding pp.9-31.
PhD thesis on FFT, Bevan Baas Read Chapter 2 p.6-15 for more information.

Homework / Projects

All future dates tentative until hwk/project assigned.

Number Due Date % Hwk/proj grade Material covered and addiotional files
 1   Sept. 18, 2:30pm 7% Binary arithmetic and conversion, verilog, UART interface testbench template testbench for UART Example Matlab file for sending the string
 2  Thu, Oct. 9, 2:30pm 15% Part1:UART interface and image color change in FPGA, Part2: LDPC decoder simulation, Part 2:LDPC Decoder imageRGB2BW.m RGB2BW_FPGA.m uart_tb.v , parrot128.png , results_minsum.txt , sample matlab file for decoding in problem 3. The matlab file uses sign_tm and multbin functions , sign function , Sample matlab code for binary multiplication for sysndrome check , Sample top verilog file for the fullparallel LDPC decoder
 3  First part due Tue, Nov. 4, 2:30pm 15% Part 1: Implementation of FFT module and verigifcation using ISIM simulator Part 2: FFT test with UART interface on ML505 FPGA board Sample design files
 4  Phase 1 and part of Phase 2 is due Thu Nov. 21,   20% Final Project:Accelerometer frequency and amplitude analysis on FPGA hardware Provided design files and examples

Course Topics and Lecture Slides

Future details are tentative.

Date Lecture Topics
   Introduction Course introduction, digital signal processing intro.
Verilog 1 Verilog.
Sign extension Number representation, Sign extension.
Verilog 2 More on Verilog and Digital Design.
Squaring Squaring.
Fixed Input Mults Multipliers.
Notes on UART interface Xilinx UART interface
Xilinx Manual on UART Xilinx UART manual.
LDPC Decoding LDPC decoding algorithm and architectures.
Matlab Example Results for LDPC Decoder Matlab results for LDPC decoder example in the slides
FPGA Architectures FPGA Comparison with ASIC and DSP Implementation.
FPGA Design Flow FPGA design flow.
Pipelining Pipelining.
ISE Synthesis and Place and Route Options ISE Synthesis and Place and Route Options.
Xilinx Xpower Analyzer Overview of Xpower Analyzer, starts from p.15.
fixedpoint conversion in matlab fixedpoint conversion in matlab.
Saturation Overview of Saturation in Verilog.
Rounding Overview of Rounding in Verilog.
Sequential basics Sequential Basics & Pipelining example.
Verilog Control Control circuits in Verilog.
Statemachines Finite State Machines.
Memories Overview of memories and implementation.
Examples and FIFO Examples and FIFO.
FFT Intro Overview of FFT, and its derivation.
FFT Diagrams FFT diagrams.
FFT Example from Book FFT Example solution FFT Example.
FFT implementation and memory addressing Overview of FFT and implementation, page 7-12.
More details on FFT implementation FFT Implementation details
Manual on serial transmission Overview of serial transmission.
Serial interface for FFT Diagram Serial Interface block diagram.
Serial Transmission design files Serial Transmission design files.
Memories Memories.
dB Description of dB.
Filter Coefficient Filter Coefficient Design.
Filter Response Filter Frequency Response.
FIR Scaling FIR Scaling
Signal Mags Signal Magnitudes.
Xilinx FFT Core generator Xilinx FFT Core generator.
Cordic CORDIC algorithm for trigonometric and Hyperbolic functions
Xilinx Core generator Xilinx Core generator, example
Cordic Core generator Xilinx Cordic Core generator
Upsampling and Downsampling Upsampling and downsampling concepts by Deborah Goshorn at UCSD.

Last update: October, 2013