UMBC CMSC 313, Computer Organization & Assembly Language, Fall 2004, Section 0101

Flip Flops I

Tuesday 11/16, 2004

Up]

Assigned Reading in Murdocca & Heuring:  A.11

Assigned Reading in Neveln:   

Assigned:   

Due:   

Slides (in PDF): Slides21.pdf

Topics Covered:

• Introduction to sequential logic and finite state machines.
• An SR latch.
• Hazards & glitches and why we need clocks.
• A clocked S-R latch, a clocked D latch
• A master-slave D flip-flop and timing issues.
• Two phase clocks.
• Latches vs flip-flops: definitions & terminology.
• JK flip-flops and endless toggle.

Circuits in DigSim:

Following these links will launch the DigSim Java applet and load the circuit described.

• An SR flip-flop
• A clocked SR flip-flop
• D flip-flop
• Master-Slave D flip-flop
• Master-Slave D flip-flop with race condition
• Master-Slave D flip-flop with a two-phase clock
• JK flip-flop