UMBC CMSC 313, Computer Organization & Assembly Language, Spring 2002, Section 0101

Combinational Logic Components

Tuesday 04/16, 2001

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Assigned Reading in Murdocca & Heuring:  A.10

Assigned Reading in Neveln:   

Assigned:  HW4

Due:  HW3

Topics Covered:

• Standard components in combinational logic: multiplexers, demultiplexers, decoders and priority encoders.
• Using an 8-to-1 multiplexer to implement the MAJ3 function.
• Using a 4-to-1 multiplexer to implement any Booelan function of 3 variables.
• Example: using components to combine smaller memory units to form larger memory units. (This material is in Murdocca & Heuring 7.2 to 7.5.)
• Read-Only Memory (ROM) implemented using a decoder and using ROM as a look-up table.

Circuits in DigSim:

Following these links will launch the DigSim Java applet and load the circuit described.

• A 4-to-1 Multiplexer
• A 1-to-4 Demultiplexer
• A 2-to-4 Decoder