UMBC CMSC 313, Computer Organization & Assembly Language, Fall 2003, Section 0101

Finite State Machines

Thursday 11/20, 2001

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Assigned Reading in Murdocca & Heuring:  A.12-A.13

Assigned Reading in Neveln:   

Assigned:   

Due:   

Topics Covered:

• Slides are available in PDF: Slides24.pdf
• Discussed DigSim Exercise 1.
• Two-phase clocks solve the difficulty with Master-Slave J-K Flip Flops.
• Mealy vs Moore models of finite state machines.
• Vending machine example.
• Sequence detector example.

Circuits in DigSim:

Following these links will launch the DigSim Java applet and load the circuit described.

• A Mod 4 Counter (Mealy)
• A Mod 4 Counter (Moore)
• A master-slave JK flip-flop
• A master-slave JK flip-flop using a two-phase clock
• A Sequence Detector (optimized)