UMBC CMSC 313, Computer Organization & Assembly Language, Fall 2002, Section 0101

Circuit Simplification I

Tuesday 11/19, 2002

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Assigned Reading in Murdocca & Heuring:  B.1-B.2

Assigned Reading in Neveln:   

Assigned:   

Due:   

Topics Covered:

• Difference between the Mealy and the Moore models of the Mod 4 Counter:

  In the Mealy model, when the reset button is pushed, the output is immediately "reset" to 00. Furthermore, the output does not remain 00 for a full clock cycle, since the flip-flops "latch" the 00 setting which makes the output 01 during the next clock cycle.

  In the Moore model, the output is dependent only on the state bits and not the input bits. When the reset button is pushed, it sets the state bits to 00, but this does not change the output until the next cycle. During the next cycle, the output is 00 for the full duration of that cycle.

• Using Karnaugh maps to simplify combinational logic circuits.
• Karnaugh maps find the smallest circuit in SOP or POS form. The algorithm for finding the smallest SOP circuit is:
  1. Find all of the prime implicants.
  2. Include all essential prime implicants.
  3. Cover the remaining 1's by trying all possible combinations.
• Here "smallest" means the smallest number of minterms (for SOP) and, among the formulas with the same number of minterms, the smallest number of factors in the minterms.
• There may be smaller circuits with more than 2 levels. Also, for functions with multiple bits of output, minimization should consider common subexpressions in the formulas for each bit of output. Karnaugh maps do not do this.
• In general circuit minimization is a hard problem (e.g., harder than cracking passwords).

Circuits in DigSim:

Following these links will launch the DigSim Java applet and load the circuit described.

• A Mod 4 Counter (Mealy)
• A Mod 4 Counter (Moore)