University of Maryland Baltimore County

Department of Computer Science and Electrical Engineering

CMSC 411, Spring 2023

Computer Architecture

Monday and Wednesday 1:00 PM--2:15 PM, ITE 233

Course Information

Instructor and TA Contact Information

Course Syllabus

Grade structure and policy

Lecture Schedule

Assignments

Projects

Links

Course Instructor

Dr. Mohamed Younis

Office: ITE 318

E-mail: younis@cs.umbc.edu

URL:    http://www.cs.umbc.edu/~younis

Lab: Embedded Systems and Networks Lab

Office hours: Monday and Wednesday (2:15 - 3:15 pm)

Research interest:

Wireless Ad-hoc and Sensor Networks, Security, Underwater communications, Fault tolerant computing and communication, Real-time systems, and Vehicular networks

Teaching Assistant

Mrs. Suhee Sanjana Mehjabin

Office: ITE 349B

E-mail: suheesm1@umbc.edu

Office hours: Tuesday and Thursday (1:00 - 2:00 pm)

Grader

Mr. Rohit Sriram Muniganti

Office: ITE ???

E-mail: rohitsm1@umbc.edu

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Course Syllabus

Textbook:

Computer Organization and Design, The hardware/software interface, Fifth Edition David A. Patterson and John L. Hennessy Morgan Kaufmann Publishers, ISBN 978-0-12-407726-3 978-0-12-374493-7

Course Outline

1. Instruction Set Architecture

- Instruction formats and semantics

- Addressing modes

2. Performance Evaluation

- Measures of performance

- Benchmarks and metrics

3. Machine Arithmetic

- ALU design

- Integer multiplication and division

- Floating-point arithmetic

4. Processor Design

- Datapath design

- Instruction execution and sequencing

- Hardwired and microcode control

5. Pipelining and Instruction-Level Parallelism

- Pipelining (Basic Pipeline Operations)

- Data and Control Pipeline Hazards

- Instruction-Level Parallelism

6. Memory Hierarchy

- Cache design & evaluation

- Virtual addressing

- Performance evaluation

7. Input/Output

- Types of I/O devices

- Device access and interface

- Device control

- I/O performance

8. Multiprocessing (time permitting)

- Interconnection networks

- Programming issues

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Grade Structure and Policy

Course work	Grade distribution
Mid-term Exam	25%
Final Exam	30%
Project	25%
Homework	20%

- Five assignments will be given and normalized to %20 of the final grade

- Assignments are due in class. Late assignments are not accepted.

- Final Exam is comprehensive covering the whole subjects included in the course and discussed in the lectures

- The project emphasizes architecture design. It requires writing an architecture simulator using a high level programming language such as C++.

- Late projects are not accepted.

- Copying/cheating will result in a minimum punishment of a zero grade for the assignment or project.

- Academic Integrity Statement:

"By enrolling is this course, each student assumes the responsibilities of an active participant in UMBC's scholarly community in which everyone's academic work and behavior and held to the highest standards of honesty.Cheating, fabrication, plagiarism, and helping others to commit these acts are all forms of academic dishonesty, and they are wrong.Academic misconduct could result in disciplinary action that may include, but is not limited to, suspension or dismissal.To find useful information about avoiding plagiarism infractions through appropriate citations, or to read the full policy regarding student academic misconduct for the graduate school, please see http://www.umbc.edu/provost/integrity."

Course grade	Range
A	90% - 100%
B	80% -89.9%
C	70% -79.9%
D	60% - 69.9%

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Lecture notes

Lecture	Date	Subject
1	January 30, 2023	Introduction and overview
2	February 1, 2023	Instruction Semantics and representation
3	February 6, 2023	Addressing Modes & Architectural Design Guidelines
4	February 8, 2023	Performance Evaluation and Metrics
5	February 13, 2023	Performance benchmarks
6	February 15, 2023	Arithmetic Logic Unit
7	February 20, 2023	Multiplier's Design
8	February 22, 2023	Performing Division
9	February 27, 2023	Floating Point Operations
10	March 1, 2023	Single-Cycle Datapath and Control
11	March 6, 2023	Multi-cycle Processor Design
12	March 8, 2023	Micro-programming and Exceptions
13	March 13, 2023	Introduction to Pipelining
14	March 15, 2023	Pipelined Datapath and Control
15	March 27, 2023	Handling Pipeline Hazards
16	March 29, 2023	Instruction Level Parallelism
17	April 3, 2023	Review
18	April 5, 2023	Midterm Exam
19	April 10, 2023	Dynamic Pipeline Scheduling
20	April 12, 2023	Memory Hierarchy and Cache
21	April 17, 2023	Cache Performance
22	April 19, 2023	Cache Memory (Cont.)
23	April 24, 2023	Virtual Memory
24	April 26, 2023	Virtual Memory (Cont.)
25	May 1, 2023	I/O Systems
26	May 3, 2023	Bus Interconnect
27	May 8, 2023	Interfacing I/O Devices
28	May 10, 2023	Multiprocessor systems
29	May 15, 2023	Review
30	May 24, 2023	Final Exam (1:00PM--3:00PM)

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Assignments

Assignment	Date Out	Due Date
Assignment #1	February 13, 2023	February 20, 2023
Assignment #2	February 27, 2023	March 6, 2023
Assignment #3	March 8, 2023	March 15, 2023
Assignment #4	March 27, 2023	April 3, 2023
Assignment #5	April 26, 2023	May 3, 2023

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Project

Project	Date Out	Due Date
Term Project	April 3, 2023	May 10, 2023

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Links

- Cadance VHDL Resources

- Cadance VHDL Tutorial (Jim Plusquellic)

- VHDL Tutorial slides (Jim Plusquellic)

- VHDL Resources in CMPE 315 (Chintan Patel)

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Last Revised: May 9, 2023