University of Maryland Baltimore County

Department of Computer Science and Electrical Engineering

CMSC 411, Fall 2025

Computer Architecture

Monday and Wednesday 2:30 PM--3:45 PM, SOND 101

Course Information

Instructor and TA Contact Information

Course Syllabus

Grade structure and policy

Lecture Schedule

Assignments

Projects

Links

Course Instructor

Dr. Mohamed Younis

Office: ITE 325G

E-mail: younis@cs.umbc.edu

URL:    http://www.cs.umbc.edu/~younis

Lab: Embedded Systems and Networks Lab

Office hours: Monday and Wednesday (3:45 - 4:45 pm)

Research interest:

Internet of Things, Smart Health Systems, Security, Underwater communications, Fault tolerant computing and communication, Cyber-Physical systems, and Vehicular networks

Teaching Assistant

Ms. Duo Zhong

Office: ITE 349B

E-mail: duoz1@umbc.edu

Office hours: Tuesday and Thursday (1:00 - 2:00 pm)

Back to top

Course Syllabus

Textbook:

Computer Organization and Design, The hardware/software interface, Sixth Edition David A. Patterson and John L. Hennessy Morgan Kaufmann Publishers, ISBN 978-0-12-407726-3 978-0-12-374493-7

Course Outline

1. Instruction Set Architecture

- Instruction formats and semantics

- Addressing modes

2. Performance Evaluation

- Measures of performance

- Benchmarks and metrics

3. Machine Arithmetic

- ALU design

- Integer multiplication and division

- Floating-point arithmetic

4. Processor Design

- Datapath design

- Instruction execution and sequencing

- Hardwired and microcode control

5. Pipelining and Instruction-Level Parallelism

- Pipelining (Basic Pipeline Operations)

- Data and Control Pipeline Hazards

- Instruction-Level Parallelism

6. Memory Hierarchy

- Cache design & evaluation

- Virtual addressing

- Performance evaluation

7. Input/Output

- Types of I/O devices

- Device access and interface

- Device control

- I/O performance

8. Multiprocessing (time permitting)

- Interconnection networks

- Programming issues

Back to top

Grade Structure and Policy

Course work	Grade distribution
Mid-term Exam	25%
Final Exam	30%
Project	25%
Homework	20%

- Four assignments will be given and normalized to %20 of the final grade

- Assignments are due in class. Late assignments are not accepted.

- Final Exam is comprehensive covering the whole subjects included in the course and discussed in the lectures

- The project emphasizes architecture design. It requires writing an architecture simulator using a high level programming language such as C++.

- Late projects are not accepted.

- Copying/cheating will result in a minimum punishment of a zero grade for the assignment or project.

- Academic Integrity Statement:

"By enrolling is this course, each student assumes the responsibilities of an active participant in UMBC's scholarly community in which everyone's academic work and behavior and held to the highest standards of honesty.Cheating, fabrication, plagiarism, and helping others to commit these acts are all forms of academic dishonesty, and they are wrong.Academic misconduct could result in disciplinary action that December include, but is not limited to, suspension or dismissal.To find useful information about avoiding plagiarism infractions through appropriate citations, or to read the full policy regarding student academic misconduct for the graduate school, please see http://www.umbc.edu/provost/integrity."

Course grade	Range
A	90% - 100%
B	80% -89.9%
C	70% -79.9%
D	60% - 69.9%

Back to top

Lecture notes

Review

Lecture	Date	Subject
1	August 27, 2025	Introduction and overview
2	September 3, 2025	Instruction Semantics and representation
3	September 8, 2025	Addressing Modes & Architectural Design Guidelines
4	September 10, 2025	Performance Evaluation and Metrics
5	September 15, 2025	Performance benchmarks
6	September 17, 2025	Arithmetic Logic Unit
7	September 22, 2025	Multiplier's Design
8	September 24, 2025	Performing Division
9	September 29, 2025	Floating Point Operations
10	October 1, 2025	Single-Cycle Datapath and Control
11	Ocober 6, 2025	Multi-cycle Processor Design
12	October 8, 2025	Micro-programming and Exceptions
13	October 13, 2025	Introduction to Pipelining
14	October 15, 2025	Pipelined Datapath and Control
15	October 20, 2025	Handling Pipeline Hazards
16	October 22, 2025	Instruction Level Parallelism
17	October 27, 2025	Review
18	October 29, 2025	Midterm Exam
19	November 3, 2025	Dynamic Pipeline Scheduling
20	November 5, 2025	Memory Hierarchy and Cache
21	November 10, 2025	Cache Performance
22	November 12, 2025	Cache Memory (Cont.)
23	November 17, 2025	Virtual Memory
24	November 19, 2025	Virtual Memory (Cont.)
25	November 24, 2025	I/O Systems
26	December 1, 2025	Bus Interconnect
27	December 3, 2025	Interfacing I/O Devices
28	December 8, 2025	Multiprocessor systems
29	December 12, 2025	Final Exam (1:00PM--3:00PM)

Back to top

Assignments

Assignment	Date Out	Due Date
Assignment #1	September 15, 2025	September 22, 2025
Assignment #2	October 6, 2025	October 13, 2025
Assignment #3	October 20, 2025	October 27, 2025
Assignment #4	November 17, 2025	November 24, 2025

Back to top

Project

Project	Date Out	Due Date
Term Project	November 3, 2025	December 1, 2025

Back to top

Links

- Cadance VHDL Resources

- Cadance VHDL Tutorial (Jim Plusquellic)

- VHDL Tutorial slides (Jim Plusquellic)

- VHDL Resources in CMPE 315 (Chintan Patel)

Back to top

Last Revised: August 5, 2025