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Course Information:

Course Name: CMPE418, VLSI Design Verification and Testing

Course Instructor: Reza M. Rad

Office Hours: Tu-Th 6:45-7:30pm or by appointment

Announcements:

Suggested topics for reading and presentation assignments

Lectures:

Syllabus

Before We Start ..

Introduction

Overview

Economics

Defects

Faults

Simulation

Fault Simulation

Testability Measures

Combinational ATPG I

Combinational ATPG II

DFT, Scan

BIST I

BIST II

Delay Faults I

Delay Faults II

Memory Test

Project:

Project Description

AC97 Design Example

Manuals and Tutorials:

Flash Tutorial for RTL Compiler

Source page for above tutorial

Flash Tutorial for SOC Encounter

Source page for above tutorial

Verilog simulator quick setup help

RTL Compiler

SOC Encounter user guide

Encounter text commands user guide

Acknowledgement:

I would like to acknowledge Dr. Plusquellic for giving me the permission to use his course materials and slides in this course.

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