UMBC CMSC 313, Computer Organization & Assembly Language, Fall 2012

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Thursday, November 29, 2012

Assigned:         Due:   

Finite State Machines II

Assigned Reading in Null & Lobur:   

Assigned Reading in Duntemann:   

Preview Slides (in PDF): Slides25.pdf

Topics Covered:

• Finite State machine design & simplification (abbreviated)
  Complete example of using finite state machine simplification steps on a "Sequence Detector" (not shown in class): Sequence Detector (full slides).pdf

• Putting togehter a 2-bit CPU.

Circuits Shown:

• Sequence Detector:
  • Sequence Detector.circ
  • Sequence Detector (optimized).circ
  • Sequence Detector (JK flip flops).circ

• 2-bit Arithmetic Logic Unit (ALU): 2-bit ALU.circ

• 2-bit CPU:
  • Version 1: 2-bit CPU v1.circ
  • Version 2: 2-bit CPU v2.circ
  • Version 3: 2-bit CPU v3.circ
  • Version 4: 2-bit CPU v4.circ
  • Version 5: 2-bit CPU v5.circ
  • Version 6: 2-bit CPU v6.circ
  • Version 7: 2-bit CPU v7.circ
  • Version 8: 2-bit CPU v8.circ
    An "assembler" in an Excel spreadsheet: assembler.xlsx
  • Version 9: 2-bit CPU v9.circ
  • Version 10: 2-bit CPU v10.circ